The 2nd stage of government-funded Silicon on Sapphire (SOS) Epi R&D project successfully completed by Epiel and accepted by the customer
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15.12.2010
The project encompasses material research as well as equipment and process investigations with the ultimate goal to elaborate a production technology for a 150 mm SOS structure with ultra-thin Si Epi layer. The structure incorporates an ultra-thin layer of silicon on a highly insulating sapphire substrate.
Applications of ultra-thin SOS Epi include high performance radio frequency CMOS integrated circuits used in mobile wireless devices.
The project is to be completed by December 2011.
